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INSURANCE FOR HIGH-VALUE WAFERS, SUBSTRATES & WORK-IN-PROGRESS
Why Wafer & Substrate Damage Risk Is So Costly
In semiconductor manufacturing, the “stock” you hold isn’t a pallet of finished goods. It’s often wafers, substrates and work-in-progress (WIP) that accumulate value at every process step. By the time a wafer has moved through multiple lithography, deposition, etch, implant, CMP, clean, metrology and inspection stages, its value can be significant — and a single defect event can impact an entire lot.
Wafer and substrate losses can arise from contamination, handling damage, tool malfunctions, process drift, chemical issues, humidity/temperature excursions, or packaging and transport incidents between facilities. They can also surface late: defects may not be detected until electrical test, packaging, customer qualification or field performance, creating costly scrap, rework, re-run and delivery failures.
Insure24 arranges wafer / substrate damage and defect risk insurance designed for semiconductor manufacturers, foundries, MEMS producers, packaging and test sites, and advanced electronics operations — helping protect your materials, WIP value, and the continuity of your order book.
PROTECT WAFERS, SUBSTRATES, LOTS & YIELD
Cover That Reflects Accumulated Value, Not Just Raw Material Cost
Traditional property insurance may treat wafers as “stock” with a basic valuation basis. But for semiconductor manufacturers, the financial exposure is often the accumulated processing value, customer-specific materials, and the cost of re-running lots. A specialist approach helps ensure sums insured and cover triggers match your process reality.
What Wafer / Substrate Damage & Defect Risk Insurance Can Cover
Cover can be structured to protect wafers, substrates and WIP against sudden and accidental loss events, and in some cases specialist extensions may be considered for contamination or process-related losses, subject to underwriting and policy wording.
Typical Insured Items
- Raw wafers and incoming substrates (silicon, SiC, GaN, glass, ceramics, etc.)
- Wafers in process (front-end, back-end and wafer-level packaging stages)
- Diced wafers, die banks and packaged units pending test/calibration
- Photomasks/reticles and critical production tooling (where applicable)
- Customer-owned wafers/substrates held under contract (bailee’s risk)
- Consigned inventory and high-value lots with strict traceability
Typical Loss Causes / Triggers
- Accidental breakage, drop, impact or mishandling during transfer
- Tool malfunction causing immediate damage to wafers/lots
- Power interruption leading to process failure and scrap
- HVAC excursion causing humidity/temperature drift and contamination risk
- Chemical mix errors or contamination in wet processing
- Water leak or suppression discharge impacting WIP storage areas
- Transit incidents between sites (where transit cover is arranged)
- Fire, smoke or soot contamination affecting controlled environments
Defect Risk: Why Semiconductor Losses Often Surface Late
Some wafer losses are obvious — cracked wafers, broken cassettes, visible contamination, or a tool crash. Others are subtle: microscopic defects, process drift, and contamination that only becomes apparent at wafer probe, final test, reliability testing, or customer qualification. This is where defect risk becomes both expensive and challenging to insure.
Insurers typically focus on sudden, identifiable events with clear timing and causation. Where defect-related cover is considered, underwriters will want strong quality controls, traceability, incident logging, and a clear understanding of how defects are detected and isolated. Insure24 can help you position your risk to achieve the best available cover terms.
Common Sources of Defect-Driven Loss
- Particle contamination causing yield loss across lots
- Lithography misalignment or focus drift
- Etch depth variation or micro-loading effects
- Thin-film deposition thickness drift impacting device performance
- CMP non-uniformity or scratches leading to latent failures
- Moisture ingress during storage or wafer-level packaging
- ESD damage to sensitive structures or integrated circuitry
Controls Underwriters Like to See
- SPC, metrology and in-line inspection controls
- Lot traceability, traveler records and defect mapping
- Tool maintenance and calibration logs
- Cleanroom monitoring and excursion response process
- Material incoming inspection and supplier audit process
- Containment and corrective action procedures (8D / CAPA)
- Customer notification and recall/rectification workflow (where applicable)
Customer-Owned Wafers (Bailee’s Risk) & Contract Obligations
Many semiconductor manufacturers hold customer-owned wafers, substrates or materials under contract for processing, packaging, test or module assembly. If those items are damaged, you may be contractually responsible for replacement cost, processing value and/or delivery penalties.
A bailee’s risk extension (sometimes called “customers’ goods” or “goods held in trust”) can be important where you hold significant third-party property. The key is aligning the insurance valuation basis and limits to the real contractual exposure.
Why This Matters
- Customer-owned wafers may be high value and customer-specific
- Contracts can require replacement at full value, not raw cost
- You may be liable while goods are on-site and during internal movement
- Claims often involve detailed traceability and investigation
- Limits need to match peak values, not average inventory
Information That Helps Quotation
- Max value of customer goods on site at any one time
- Contract wording regarding liability and valuation
- Storage controls, segregation and access restrictions
- Cleanroom handling protocols and training procedures
- Packaging and internal transport arrangements
- Loss history and incident reporting process
Wafer & Substrate Transit Risk (Between Sites)
Many semiconductor flows involve movement between sites: wafers to an OSAT partner, substrates to a packaging location, die banks to a test facility, or shipments to customers for qualification. Transit risk should be assessed separately, and marine cargo / goods in transit cover can be arranged to protect high-value shipments.
Transit Risks to Consider
- Impact/shock damage and vibration exposure
- Temperature and humidity excursion during transport
- Theft of high-value shipments
- Customs delay and storage in uncontrolled environments
- Misrouting and handling damage at hubs
- Inadequate packaging or insufficient shock monitoring
How Insurance Can Be Structured
- Annual cargo policies for regular movements
- Single shipment cover for high-value one-offs
- Door-to-door terms with appropriate conditions
- Valuation basis reflecting invoice + costs (or agreed value)
- Options for temperature-controlled transit extensions
- Claims support for documentation and recovery from carriers
Wafer / Substrate Loss Scenarios (Semiconductor Examples)
Case Study: Tool Malfunction & Lot Scrap
Situation: A tool fault caused immediate damage to wafers within a lot during processing.
Impact: Scrap of affected wafers, re-run costs, and delivery delay.
How Insurance Helps: Where triggered by an insured event, cover can respond to the value of damaged stock/WIP and associated recovery costs, subject to policy terms.
Case Study: Cleanroom Excursion & Contamination
Situation: A cleanroom HVAC issue caused environmental drift and particulate risk during critical stages.
Impact: Yield loss, investigation, and potential scrap depending on test results.
How Insurance Helps: Specialist programmes may consider contamination-related extensions depending on controls and wording, alongside property/engineering triggers.
Case Study: Handling Damage During Internal Transfer
Situation: A cassette was dropped during transfer, damaging wafers and contaminating a controlled area.
Impact: Scrap, clean-up, and lost time in the affected zone.
How Insurance Helps: Cover can respond to sudden and accidental damage to stock/WIP and associated costs, subject to policy wording and limits.
Case Study: Transit Shock Damage
Situation: Wafers in transit experienced shock events, and damage was discovered on arrival at a partner facility.
Impact: Delays, potential scrap and additional shipments to meet schedule.
How Insurance Helps: Cargo / goods in transit cover can protect high-value shipments door-to-door, subject to packaging conditions and policy terms.
Coverage Options for Wafer / Substrate Damage Risk
We tailor cover based on your process, lot values, customer property exposure and how defects are detected and isolated.
Starter
Ideal for: smaller lots, lower peak WIP values, early-stage operations
- Core stock/WIP protection for insured perils
- Basic accidental damage options (where available)
- Simple limits and valuation basis
Standard
Ideal for: established manufacturing with meaningful WIP accumulation
- Higher limits aligned to peak lot values
- Engineering breakdown integration for tool-driven loss triggers
- Bailee’s risk for customer-owned materials (where required)
- Optional goods in transit cover for inter-site movement
Premium
Ideal for: high-value lots, strict customer requirements and complex flows
- Enhanced valuation basis (subject to underwriting)
- Higher bailee’s risk limits and improved controls
- Broader extensions where available for contamination-type events
- Claims support aligned to traceability and investigation
Enterprise
Ideal for: multi-site operations with large WIP values and global logistics
- Programme approach for stock/WIP across sites
- Custom limits for peak exposures and client-owned materials
- Advanced transit structuring and temperature control options
- Integration with BI, supply-chain, and liability covers
Insure24 helped us insure our peak wafer WIP values properly and include customer-owned lots. The policy structure matched how value accumulates across our process.
Operations Lead, Semiconductor ManufacturerWhy Choose Insure24 for Wafer & Substrate Damage Risk Insurance
- Cover structured around accumulated WIP value and peak lot exposures
- Support for bailee’s risk where customer-owned wafers are held
- Integration with engineering breakdown and BI where needed
- Specialist guidance on controls and underwriting presentation
- Fast quotation process and claims-focused policy design
How to Get Wafer / Substrate Damage & Defect Risk Insurance
- 1. Tell us about your wafer/substrate types, processes and lot values
- 2. Provide peak WIP and storage exposures (including customer-owned goods)
- 3. Share controls: cleanroom monitoring, inspection, traceability and QA
- 4. Identify inter-site shipments for transit cover if required
- 5. We structure limits and obtain tailored quotations from suitable insurers
FREQUENTLY ASKED QUESTIONS
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Does insurance cover wafer breakage and handling damage?
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Can wafer insurance cover contamination and defect-related losses?
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How is the value of damaged wafers calculated?
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Do I need cover for customer-owned wafers (bailee’s risk)?
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Can I insure wafers in transit to packaging or test partners?
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How quickly can Insure24 provide a quote?

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